pert3 （具有协议使能功能的接收机和发射机容限测试仪）填补了物理层测试和协议层测试之间的空白，为接收机测试和发射机测试提供了更新颖的、更智能化的测试能力。该产品主要是针对于串行数据的收发系统以及其他高速串行信号的通信系统。力科的pert3不仅仅是一款新的仪器，更是代表了一类具有完整的新的概念的测试仪器。610
pert3 phoenix系统 产品详情
pert3 硬件平台
per-r008-s01-x
pert3 phoenix r8 平台
per-r008-10u-x
pert phoenix upgrade to 8g to 10g requires unit to be in serial number range of above 90xx and 91xx requires unit to be returned to factory
pert3 test suite options
sas-r006-004-a
eagle sas receiver test suite
sat-r006-004-a
eagle sata receiver test suite
pci-r008-004-a
pci express® gen 1 / gen 2 / gen 3 receiver test suite
usb-r008-001-a
usb 3.0 receiver tolerance - phoenix
pert3附件
per-ac12-c01-x
sma pair high end
per-ac12-m01-x
sma to smp pair
per-ac06-q01-x
rise time filters
per-r008-acs-x
pcie gen3 tx/rx/linkeq test accessories
per-r008-isi-x
sata isi board for pert3 phoenix and eagle
annual calibration of pert3 systems
per-ca08-001-c
annual calibration of pert3 phoenix 8g system
bundled warranty and calibration of pert3 systems
per-ca08-w01-w
three year warranty and two additional years calibration for phoenix 8g 1 channel system
per-ca08-wx1-w
five year warranty and four additional years calibration for phoenix 8g 1 channel system
新问题的新解决办法
许多下一代高速串行标准，协议层可优化物理层，比如为长且有噪声的传输通道设置合理的发送接收均衡。这需要pert3这类新型仪器来执行标准的接收测试，以及在协议层上和发送端进行通信。因此pert3可用于集成的发送端和接收端测试，优化测试时间，降低设备数量和连接复杂性。
什么是协议支持能力
带协议支持能力的bert系统，是能够和被测设备进行协议握手，例如均衡训练，并执行电气特性测量的仪器。
什么是pert3
pert3结合了bert系统的物理层测试能力，以及和被测物进行协议握手和训练的能力。
关键特性· 带协议支持能力的误码率测试仪
· 可用于接收机抖动和容限测试的抖动生成功能。
· 内置3阶去嵌发生器
· 支持协议的发生器和接收机状态机
· 用户可自定义测试脚本，用于抖动容限、均衡优化，搜索和多参数的扫描测试。
· 用户可自定义协议握手和训练的状态机。
generator data out
generator jitter stress
bit rate
1 gb/s to 8.5 gb/s
random jitter source
step size
100khz
10 khz – 1.5mhz rms jitter
1.2 – 9 psec rma
rise/fall time (20-80%)
35 psec typical
1.5 mhz- 100mhz rma jitter
1.2 – 12 psec rms
differential amplitude range
50mv to 2.2v, 5mv steps
1.5 mhz – 1000mhz rms jitter
1.2 – 12 psec rms
voltage offset
-2v to +2v
sinusoidal jitter source
intrinsic jitter
12 psec pp typical with internal clock
10 khz- 100khz jitter
100 – 15000 psec
de-emphasis
100khz – 500khz jitter
100 – 2000 psec
# taps
3
0.5 mhz – 1000mhz jitter
0 – 300 psec
range
-0.5db to -9db
common mode source
step
0.1db
100mhz – 1000mhz jitter
50 – 350 mv
ssc support
23khz-33khz
sinusoidal waveform
-5000ppm to +5000ppm
differential mode source
triangular/sinusoidal waveforms
100mhz – 2500mhz jitter
0 – 30 mv
connector:
k-type female
sinusoidal waveform
interface
differential or single-ended, dc coupled, 50 ohm
external jitter injection
single error inject:
adds single error on demand
frequency range
0.5 ~ 100 mhz
generator clock out
modulation range
1 ~ 200 psec
clock rate
at rate divided by any integer between 1-255
input impedance
50 ohms
duty cycle
40-60%
amplitude range
60-600 mv
amplitude
0.1 vpp-diff to 2vpp-diff
interface
dc coupled, 50 ohms
output voltage window
-2v-2v
connector
sma female
interface
differential or single-ended, dc coupled, 50 ohm
data in
connector
sma female
data rates
1 gb/s to 8.5gb/s
input impedance
50ohms
protocol supported
amplitude range
200 – 1800 mv
pci express
2.5, 5 and 8 gb/s
clock in
sas
1.5, 3 and 6 gb/s
frequency range
1 ghz to 8.5 ghz
sata
1.5, 3 and 6 gb/s
termination
50 ohms
usb3.0
5gb/s
amplitude range
600 – 1200 mv
tigger out
amplitude range
600 – 800 mv
isi
external